Embedded processor security

d'Auriol, Brian J. and Pathan, Al-Sakib Khan (2007) Embedded processor security. In: 2007 International Conference on Security and Management (SAM'07), June 25-28, 2007, Las Vegas, Nevada, USA.

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Abstract

A preliminary model is introduced in this paper whereby data and its associated security properties are treated as a single atomic unit of information in a hardware-only context. Security-tagged data allows each datum to be properly manipulated with a predictable assurance. This paper addresses the data modeling, process modeling and network modeling of the associated security-tagged data. This work is a part of a larger issue that instruction set architectures (ISAs) do not consider the information assurance implications in its operational environment.

Item Type:	Conference or Workshop Item (Full Paper)
Additional Information:	6841/709
Uncontrolled Keywords:	information assurance, confidentiality, integrity, processor architecture
Subjects:	Q Science > Q Science (General) Q Science > QA Mathematics > QA76 Computer software
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button):	Kulliyyah of Information and Communication Technology Kulliyyah of Information and Communication Technology Kulliyyah of Information and Communication Technology > Department of Computer Science Kulliyyah of Information and Communication Technology > Department of Computer Science
Depositing User:	Dr. Al-Sakib Khan Pathan
Date Deposited:	02 Aug 2011 12:03
Last Modified:	02 Aug 2011 12:04
URI:	http://irep.iium.edu.my/id/eprint/709

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