Olanrewaju, Rashidah Funke and Fajingbesi, Fawwaz Eniola and Junaid, S. B. and Alahudin, Ridzwan and Anwar, Farhat and pampori, Bisma Rasol (2017) Design and implementation of a five stage pipelining architecture simulator for RiSC-16 instruction set. Indian Journal of Science and Technology, 10 (3). pp. 1-9. ISSN 0974-6846 E-ISSN 0974-5645
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Abstract
In modern computing, multitasking is the most favorable aspect. An un-pipelined instruction cycle (fetch-execute cycle) CPU processes instructions one after another increasing duration at lesser speed in completing tasks. With pipelined computer architecture, unprecedented improvement in size and speed are achievable. This work investigates the possibility of a better improvement to computer architecture through understanding the inner workings of instruction pipelining in operating system. A design of a 5 stage pipelined architecture simulator for RiSC-16 processors using Visual Basic programming has been achieved contrary to the common available four stage simulators. The simulator also future two most common pipeline instruction hazards generally missing in most available simulators. Thus, the designed simulator becomes an appropriate tool for understanding the concept of pipelining on a step-by-step visualization based instruction cycle processors hence facilitating a more efficient design in computer architecture. The simulator has been evaluated based on its closeness to real-time pipelined computer architecture and through execution of all 8 basic RiSC-16 instruction set with data dependency and control hazard.
Item Type: | Article (Journal) |
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Additional Information: | 6796/56118 |
Uncontrolled Keywords: | Computer Processor & Architecture, Instruction Pipelining, RiSC-16 Simulator |
Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices |
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button): | Kulliyyah of Engineering > Department of Electrical and Computer Engineering Kulliyyah of Engineering |
Depositing User: | Dr. Rashidah Funke Olanrewaju |
Date Deposited: | 14 Apr 2017 11:54 |
Last Modified: | 28 Nov 2019 08:56 |
URI: | http://irep.iium.edu.my/id/eprint/56118 |
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