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Negative bias temperature instability characterization and lifetime evaluations of submicron pMOSFET

Hatta, Sharifah Wan M. and Hussin, Hanim Yati and Soon, F.Y. and Abdul Wahab, Yasmin and Abdul Hadi, Dayanasari and Soin, Norhayati and Alam, A. H.M.Zahirul and Nordin, Anis Nurashikin (2017) Negative bias temperature instability characterization and lifetime evaluations of submicron pMOSFET. In: 2017 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE 2017), 24th-25th April 2017, Pulau Langkawi, Kedah.

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Abstract

A major effect of different measurement delay in seconds is revealed through quasi DC Stress Measure Stress experiments. We found that different delay of measurements in seconds contributed to different stress time needed to achieve target 10% degradation of Vth. The longer delay, the more time needed for the device to achieve 10% degradation of Vth. The effect on NBTI degradation is shown to be reliant on stress conditions (stress voltage, temperature) and device architecture (gate dimensions, gate oxide thickness). The NBTI lifetime was predicted by extrapolating lifetime to the nominal operating voltage from Time-to-Fail versus stress bias and oxide electric field plots. Both plots show that the lifetime of degradation parameter of Vth is lower compared to the lifetime of degradation parameter of Idsat.

Item Type: Conference or Workshop Item (Plenary Papers)
Additional Information: 4575/62886
Uncontrolled Keywords: negative bias temperature instability (NBTI); pMOSFET; semiconductor reliability estimation; threshold voltage instability; interface states
Subjects: T Technology > T Technology (General)
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button): Kulliyyah of Engineering > Department of Electrical and Computer Engineering
Depositing User: Dr AHM Zahirul Alam
Date Deposited: 21 Mar 2018 11:27
Last Modified: 26 Jun 2018 11:55
URI: http://irep.iium.edu.my/id/eprint/62886

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