CNTFET inverter: a high voltage gain logic gate

Farhana, Soheli and Alam, A. H. M. Zahirul and Khan, Sheroz (2014) CNTFET inverter: a high voltage gain logic gate. In: 2014 IEEE International Conference on Smart Instrumentation, Measurement and Applications (ICSIMA 2014), 25 November 2014, Kuala Lumpur, MAlaysia.

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Abstract

Conventional CMOS technology provides a lot of opportunities in the field of electronics device. But presently, carbon nanotube field effect transistor (CNTFET) is a new technology for the application in the field of electronic device. Due to the limitation of the size of CMOS, CNTFETs are the promising substitute due to its nano scale size. CNTFET also shows the high stability, low power circuit design, high signal to noise margin (SNM) and high gain in the circuit design. A novel design of CNTFET based inverter with an optimum chiral vector is proposed in this paper. PSPICE platform is used to model and simulation this CNTFET inverter circuit. The proposed CNTFET inverter circuit is investigated based on noise margin characteristics. A maximum voltage gain of 45dB is observed from NCNTFET of the inverter and a high noise margin of 400mV and a low noise margin of 309mV are achieved from the proposed inverters. This approach is a useful technique for fabricating integrated logic devices and circuits based on CNTFETs.

Item Type:	Conference or Workshop Item (Invited Papers)
Additional Information:	4575/42279 (ISBN: 978-1-4799-8039-0, DOI: 10.1109/ICSIMA.2014.7047424)
Uncontrolled Keywords:	CNTFET inverter
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button):	Kulliyyah of Engineering > Department of Electrical and Computer Engineering
Depositing User:	Prof. Dr. AHM Zahirul Alam
Date Deposited:	10 Mar 2015 14:09
Last Modified:	21 Sep 2017 09:14
URI:	http://irep.iium.edu.my/id/eprint/42279

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