VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM

Erdogan, S. S. and Abdul Rahman, Abdul Wahab and T., H. Hong (1993) VHDL modeling and simulation of the back-propagation algorithm and its mapping to the RM. In: IEEE 1993 Custom Integrated Circuits Conference, 9-12 May 1993, California.

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Abstract

The Reconfigurable Machine (RM) is a parallel architecture that is built using Xilinx's 4005 Field Programmable Gate Array (FPGA) and associated fast SRAMs. In this study, VHDL modeling and simulation of a fully connected there-layer Back-Propagation (BP) is attempted with a view towards its mapping to a reconfigurable . parallel architecture. The mapping encompasses both the forward and backward passes. A bottom-up approach is used which starts from the configuration of processing elements to achieve effective computation of floating-point sum-of-products. The FPGAs perform the floating-point multiplication, addition and function evaluation, while the local SRAMs are used for storing U0 data for RM.

Item Type:	Conference or Workshop Item (UNSPECIFIED)
Additional Information:	6145/38341 (DOI: 10.1109/CICC.1993.590368)
Uncontrolled Keywords:	VHDL modeling
Subjects:	T Technology > T Technology (General)
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button):	Kulliyyah of Information and Communication Technology > Department of Computer Science Kulliyyah of Information and Communication Technology > Department of Computer Science
Depositing User:	Prof Abdul Wahab Abdul Rahman
Date Deposited:	24 Sep 2014 10:40
Last Modified:	16 Dec 2020 22:49
URI:	http://irep.iium.edu.my/id/eprint/38341

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