Farhana, Soheli and Alam, A. H. M. Zahirul and Khan, Sheroz (2012) Development of a 2-digit multi valued analog-to-digital converter. World Applied Sciences Journal , 17 (5). pp. 622-625. ISSN 1818-4952
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Abstract
A 2-digit higher radix analog-to-digital converter (ADC) circuit consisting of a combination of a pipelined ADC and a set of cascaded current comparator cell has been proposed. The ADC generates multi-valued logic outputs rather than the conventional binary output system. The design is implemented using 0.25μm CMOS process. The performance analysis of the design shows desirable performance parameters in terms of response and low power consumption. The ADC design is suitable for the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple valued logic design.
Item Type: | Article (Journal) |
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Additional Information: | 4575/24247 |
Uncontrolled Keywords: | Multi Valued, MVL, ADC,CMOS |
Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button): | Kulliyyah of Engineering > Department of Electrical and Computer Engineering |
Depositing User: | Prof. Dr. AHM Zahirul Alam |
Date Deposited: | 11 Jun 2012 11:51 |
Last Modified: | 30 Nov 2020 10:02 |
URI: | http://irep.iium.edu.my/id/eprint/24247 |
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