Efficient cache replacement policy for minimizing error rate in L2-STT-MRAM caches

Olanrewaju, Rashidah Funke and Khan, Burhan Ul Islam and Khan, Abdul Raouf and Yaacob, Mashkuri and Alam, Md Moktarul (2018) Efficient cache replacement policy for minimizing error rate in L2-STT-MRAM caches. International Journal of Grid and Utility Computing, 9 (4). pp. 307-321. ISSN 1741-8488

	PDF - Published Version Restricted to Registered users only Download (512kB) | Request a copy
	PDF (SCOPUS) - Supplemental Material Restricted to Registered users only Download (82kB) | Request a copy

Abstract

In recent times, various challenges have been encountered in the design and development of SRAM cache which consequently has led to a design where memory cell technologies are converted into on-chip embedded caches. The current research statistics for cache designing reveals that Spin Torque Transfer Magnetic RAMs, preferably termed as STTMRAMs, have become one of the most promising technologies in the field of memory chip design, gaining a lot of attention from researchers due to its dynamic direct map and data access policies for reducing the average cost i.e. both time and energy optimization. Despite having efficient main memory access capability, L2-stochastic STT-MRAMs suffer due to high Write Error Rate (WER) caused by switching storage elements viz. Magnetic Tunnel Junction (MTJs) stochastically in write operations. It can be seen that cache replacement algorithms play a significant part in minimizing the Error Rate (ER) induced by write operations. The proposed study is intended to conceptualize an efficient cache replacement policy namely Minimum Error Rate (MER) along with Hamming Distance (HD) Computation to reduce the WER of L2-STTMRAM caches with acceptable overheads. The performance analysis of the proposed algorithm ensures its effectiveness in reducing the WER and cost overheads as compared to the conventional LRU technique implemented on SRAM cells.

Item Type:	Article (Journal)
Additional Information:	6796/66902
Uncontrolled Keywords:	Cache replacement algorithm, field assisted StT-MRAM, error rates, L2 cache
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button):	Kulliyyah of Engineering Kulliyyah of Engineering > Department of Electrical and Computer Engineering
Depositing User:	Professor Mashkuri Yaacob
Date Deposited:	07 Dec 2018 15:06
Last Modified:	13 Mar 2019 15:27
URI:	http://irep.iium.edu.my/id/eprint/66902

Actions (login required)

View Item