Khalifa, Othman Omran and Islam, Md. Rafiqul and Khan, Sheroz
(2004)
Cyclic redundancy encoder for error detection in communication channels.
In: 2004 RF and Microwave Conference, 5 - 6 October 2004, Subang, Selangor.
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Abstract
Cyclic Redundancy Check is one of the
most powerful methods of error detection in blocks for
digital communications signals. I t involves a division
of the transmined message block by a constant called
the generator polynomial. The quotient is discarded,
and the remainder is transmitted as the Block check
Character or Frame Check Sequence. The receiving
station performs the same computation on the received
message block. The computed remainder, FCS is
compared to the remainder received from the
transmitter. If the two match, no errors have been
detected in the message block. If the two do not match,
either a request for retransmission is made by the
receiver or the errors are corrected through use of
special coding technique. This paper describes the
methodology used and the implementation of the
Cyclic Redundancy Check (CRC) algorithm using
Ci+ programming. The technique gained its
popularity because it combines three advantages:
Extreme error detection capabilities, little overhead
and ease of implementation. The CRC is calculated by
performing a modulo 2 division of the data by a
generator polynomial and recording the remainder
atler division. The mnst commonly used polynomials
are implemented. The conclusions and analysis results
were shown and presents that the Cyclic Redundancy
Check Encoder is used i n error detection for digital
signals due to the ability to quickly determine if errors
are present. The redundancy bits produced by the
cyclic encoder enable the receiver to quickly determine
if an error was produced and different types of
polynomials are used i n CRC.
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