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A very high speed FPGA-based Sudoku solver

AlDahoul, Nouar and Htike@Muhammad Yusof, Zaw Zaw and Zarzar, Mouayad (2015) A very high speed FPGA-based Sudoku solver. In: International Conference on Advances Technology in Telecommunication, Broadcasting, and Satellite, 26-27 September, 2015, Jakarta, Indonesia. (In Press)

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This paper proposes FPGA (Field Programmable Gate Array) based high speed Sudoku solver platform. It focuses on the FPGA ability to solve complex problems in a little time. This ability comes from parallel execution of multiple processes at the same time. FPGA with 50 Mega Hertz crystal is used. The output of this work is an embedded system that is able to solve hard 9×9 puzzles within 1 µs. Some terminals such as PS2 mouse and VGA monitor were used to provide an interactive interface between the user and the platform.

Item Type: Conference or Workshop Item (Full Paper)
Additional Information: 6919/48053
Subjects: T Technology > T Technology (General)
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button): Kulliyyah of Engineering
Depositing User: Mr. Zaw Zaw Htike
Date Deposited: 22 Jan 2016 15:06
Last Modified: 22 Jan 2016 15:06
URI: http://irep.iium.edu.my/id/eprint/48053

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