Rokon, M. I. R. and Motakabber, S. M. A. and Alam, A. H. M. Zahirul and Habaebi, Mohamed Hadi and Matin, M. A, (2022) Fairness in multiprocessor hardware access to system-on-chip. In: IEEE 5th International Symposium in Robotics and Manufacturing Automation, 6 - 8 August 2022, Malacca, Malaysia.
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Abstract
This paper addresses the acces of multiprocessors into numerous blocks within an SoC (System-on-Chip). The process by which the processor, internal or external, gains the right to access different blocks on an ASIC is first they have issue an access to request a choice-making main block that determines the status of the grant to the processor. In a simple ASIC, a single processor is ideal enough to fulfil all itsd access needs, but dealing with a very complex and large ASIC requires several processors. In this type of case, it is difficult to design and extend the selection block that determines the access of the multi processor to the chip. There are many algorithms to adapt to this initiative. They all have strengths and weaknesses. The purpose of this research paper is to improve strengths and keep weaknesses away. The hardware RTL modelling of the proposed design has been done using Verilog HDL and verified by Verilog test bench. then implemented by the Xilinx Pegasus FPGA device. The Modelsim simulator and Cadence simulator, are both used simultaneously for simulation. The proposed system block can be assembled at any SoC and fabricated from a foundry. Xilinx Pegasus FPGA has been used to implement the hardware in this study and the results show good consistency with expectations and theories.
Item Type: | Conference or Workshop Item (Other) |
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Uncontrolled Keywords: | AMBA Bus Protocol, Processor Interface, Multiprocessor Round Robin Arbitration, HDL Methodology, Verilog, Simulation, Synthesis, FPGA |
Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices > TK7885 Computer engineering |
Kulliyyahs/Centres/Divisions/Institutes (Can select more than one option. Press CONTROL button): | Kulliyyah of Engineering > Department of Electrical and Computer Engineering |
Depositing User: | Dr. Mohamed Hadi Habaebi |
Date Deposited: | 20 Oct 2022 11:23 |
Last Modified: | 20 Oct 2022 11:23 |
URI: | http://irep.iium.edu.my/id/eprint/100749 |
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